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In this paper, a novel transformer-less adjustable volt- age quadrupler dc–dc converter with high-voltage transfer gain and reduced semiconductor voltage stress is proposed. The pro-posed topology utilizes input-parallel output-series configuration for providing a much higher voltage gain without adopting an ex-treme large duty cycle. The proposed converter cannot only achieve high step-up voltage gain with reduced component count but also reduce the voltage stress of both active switches and diodes. This will allow one to choose lower voltage rating MOSFETs and diodes to reduce both switching and conduction losses. In addition, due to the charge balance of the blocking capacitor, the converter fea-tures automatic uniform current sharing characteristic of the two interleaved phases for voltage boosting mode without adding extra circuitry or complex control methods. The operation principle and steady analysis as well as a comparison with other recent exist-ing high step-up topologies are presented. Finally, some simulation and experimental results are also presented to demonstrate the effectiveness of the proposed converter.